The Hot Take: New P-Cores and bus, sounds like Intel is trying to innovate again. Which is good for all of us, healthy competition will help bring/keep prices down for CPUs at least.
Intel has officially confirmed its next-gen Xeon 7 Diamond Rapids CPUs are coming in 2027, featuring 50% higher core counts and twice the memory bandwidth of Xeon 6 in a bid to compete against AMDâs upcoming EPYC Venice CPUs.
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The Hot Take: Well have to see if this claim holds up on launch.
Intel is putting its 18A node into the data center with new Xeon 6+ Clearwater Forest CPUs, which pack up to 288 E-cores for dense compute.
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The Hot Take: CISC monsters coming from owner of the x86 ISA.
COMPUTEX 2026 Intelâs upcoming Diamond Rapids Xeon will boost core counts to 192, a 50 percent increase over last generation, the x86 giant revealed at Computex in Taipei this week. But while core counts continue to rise, in doing so Intel has managed to cut thread counts by a quarter. Yep, Hyperthreading â Intel's marketing for simultaneous multithreading â is officially dead. Intel first added support for SMT all the way back in 2002. The technology boosted utilization by enabling two threads to harness idle execution units during a single cycle. While SMT doesnât double throughput, for certain applications it can deliver double-digit percentage gains. After slowly abandoning the tech across its consumer product lineup, Intel's Xeons are latest to get the cut. Except, wait! It seems Intel may have seen the error of its ways, and is already reversing course on the decision. Intelâs next next Xeon, codenamed Coral Rapids, will bring SMT back. The jump from 128 to 192 is a big jump for Intel, but still smaller than the AMD is making with its 256-core Venice Epycs. If that werenât enough, it looks like AMD could beat Intel to market by as much as a year. Diamond Rapids is now slated for release sometime in 2027. Echos of Epyc, notes of Monaka In addition to core count, we also got our first look at how Intel will stitch the chip together. It turns out AMD might have been onto something when it started gluing silicon together back in 2017, because Intelâs next round Xeons look more like an Epyc under the hood than ever. We know the chip will be fabbed using Intelâs 18A-P process tech, a refined version of its 2nm-class process tech. Beyond this details get a little fuzzy. From the renders shared in Intelâs press deck, we can see what appear to be two I/O dies serving four vertically stacked compute assemblies assembled using its Foveros packaging tech. This isnât the first time weâve seen something like this from Intel. Intelâs Clearwater Forest, which is finally launching after years of teasing, also used a similar arrangement, with four 24-core compute tiles sitting atop a base die containing the memory controller and L3 cache. Moving the L3 cache to the base die frees up a lot of die area on the compute chiplet. In this case, we're looking at four 48-core compute chiplets. In this respect, Diamond Rapids looks a lot like another CPU weâve looked at recently: Fujitsuâs Monaka. That chip uses an almost identical chip layout, albeit with one I/O die rather than two. While weâre fairly certain Diamond Rapidâs L3 cache will live on the base die, the memory controller could be housed on the four base dies or it could be on the I/O dies, similar to what AMD has done since Rome launched in 2019. If we had to guess, our bet would be on the I/O die, since it would reduce the number of NUMA nodes to one or two as opposed to four. Not a mainstream part Unlike Intelâs last P-core Xeon, codenamed Granite Rapids, donât expect to see Diamond Rapids deployed widely in enterprise virtualization or storage servers. According to Intel, Diamond Rapids is âoptimized for high-demand IaaS, high-perf/thread,â putting it in the same class as its high-performance-computing (HPC)-centric 6900P-series parts. The lack of SMT complicates hypervisor licensing models. Where you once got two threads for the price of one, Diamond Rapids customers will now be getting half as many for their dollar. There are of course ways of getting around this. Oracle rented out its Ampere-based instances, which also lack SMT, in core-pairs rather than on a core-per-core basis, but something like this would presumably require buy-in from the likes of VMware or RedHat. As with past HP- optimized processors, Diamond Rapids will be packing a much beefier memory bus than most folks are going to be looking for. HPC workloads like their memory bandwidth and the next-gen Xeon will have no shortage of it with 16-channels of DDR5. Intel hasnât disclosed what memory speeds the chip will support out of the box. With that said, Clearwater is already at 8000 MT/s on standard RDIMMS, and Granite could hit 8800 MT/s on MRDIMMS â in fact, 9600 MT/s DIMMS wouldnât be an unreasonable assumption. That works out to 1.2 TB/s of bandwidth per socket, which happens to be the same as Nvidiaâs LPDDR5X-packed Vera CPUs. Thatâs not the only thing we're still in the dark about. Power consumption and instruction per clock gains from the chipâs new architecture are details we expect Intel to trickle out. The good news: we wonât have to wait long for the next round of specifications, as Intel will be presenting on Diamond Rapids at Hot Chips in August.
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The Hot Take: Intel moving fast to make up lost ground on this front for sure. From the looks trying to hit the $ sweet spot too.
Intel revealed more details of its next-gen Data Center GPU, code-named Crescent Island, at Computex 2026. This inference-optimized chip will feature up to 480GB of LPDDR5X memory for efficient handling of massive AI contexts.
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The Hot Take: We'll see where glass takes us, it's an interesting change for sure.
Intel Foundry is leading the race towards Glass Substrates with its Rio Rancho facility, aiming to become the world's first to initiate mass production. Glass Substrates Are The Future of Semiconductors & Intel Foundry is Well on Its Way To Become The First To Initiate Mass Production Glass Core substrates have been gaining interest, as they have several benefits over traditional organic substrate solutions. The current substrates are also facing shortages due to the AI supercycle, leading one of the biggest substrate suppliers, Ajinomoto, to raise prices. These supply constraints are pushing the industry to look into new advanced packaging solutions, and [âŚ]Read full article at https://wccftech.com/intel-foundry-rio-rancho-facility-crown-jewel-in-production-of-glass-substrates/
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The Hot Take: Lets see if they are able to catch up GPU wise. I hope they aren't dropping Discrete GPUs like I've been hearing.
Intel is reportedly preparing a specialized Nova Lake processor aimed at edge AI and local inference workloads, according to information shared by leaker @GoldenPigUpgradePack.
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The Hot Take: Performance and less hybrid coming back to x86.
Intel's next-generation desktop platform is apparently going to persist for approximately three and a half full CPU generations if you include the mobile-only Titan Lake. That's just one of the major details released by serial leaker Moore's Law is Dead in a new video that also includes the claims that upcoming Intel CPUs will not only skip
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The Hot Take: NICE, Intel you can send me samples too! :D
Intelâs next desktop CPU family is apparently hitting shipping lanes, albeit as early engineering samples. Nova Lake is expected to be a much bolder reset than merely a routine refresh and could become Intelâs most aggressive swing at the high-end PC market in years, with performance claims that sound almost exaggerated until you remember
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The Hot Take: Sub 1000 notebook competition is getting heated.
Intel today unveiled its "Project Firefly" initiative in China, which aims to bring the supply chain together to allow cost-effective & standardized Wildcat Lake laptop designs. Intel Wants A Coherent Design & Pricing Structure Across Its Wildcat Lake Laptops & That's Exactly What "Project Firefly" Aims To Ensure Intel hosted an event today in China where the company formally launched its Core Series 3 SoCs for laptops, codenamed Wildcat Lake. These SoCs aim to bring better value and a unified design across a range of mainstream and entry-level PCs, which we are already seeing on the market. Announced by Intel's [âŚ]Read full article at https://wccftech.com/intel-drags-partners-into-a-unified-wildcat-lake-blueprint-as-project-firefly-standardizes-laptop-designs-to-tackle-macbook-neo/
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The Hot Take: APU's competition starting to heat up for that Ai dollar.
Intel's next-generation Razor Lake-AX chips will compete directly against AMD's Medusa Halo while featuring on-package memory. Intel Is Bringing Back On-Package Memory With Its Next-Gen Razor Lake-AX Chips That Fight Against AMD's Medusa Halo On-Package Memory was last used by Intel for its Lunar Lake SoCs. These SoCs were aimed at low-power mobile platforms, and while the chips themselves offered solid performance in a 30W budget, Intel's next on-package memory solution will be a big one. As per Haze2K1 on X, Intel Razor Lake-AX SoCs will feature on-package memory. This is a big deal as moving the DRAM closer to [âŚ]Read full article at https://wccftech.com/intel-resurrects-on-package-memory-with-razor-lake-ax-to-hunt-down-amd-medusa-halo/
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